*
* Copyright (c) 2003-2004 Fabrice Bellard
* Copyright (c) 2006 Intel Corperation
+ * Copyright (c) 2007 Keir Fraser, XenSource Inc.
*
* Permission is hereby granted, free of charge, to any person obtaining a copy
- * of this software and associated documentation files (the "Software"), to deal
- * in the Software without restriction, including without limitation the rights
- * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
- * copies of the Software, and to permit persons to whom the Software is
+ * of this software and associated documentation files (the "Software"), to
+ * deal in the Software without restriction, including without limitation the
+ * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or
+ * sell copies of the Software, and to permit persons to whom the Software is
* furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
- * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
- * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
- * THE SOFTWARE.
- */
-/* Edwin Zhai <edwin.zhai@intel.com>, Eddie Dong <eddie.dong@intel.com>
- * Ported to xen:
- * Add a new layer of periodic time on top of PIT;
- * move speaker io access to hypervisor;
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
+ * IN THE SOFTWARE.
*/
#include <xen/config.h>
#include <asm/hvm/vpt.h>
#include <asm/current.h>
-/* Enable DEBUG_PIT may cause guest calibration inaccuracy */
-/* #define DEBUG_PIT */
-
#define RW_STATE_LSB 1
#define RW_STATE_MSB 2
#define RW_STATE_WORD0 3
d = muldiv64(hvm_get_guest_time(pt->vcpu) - s->count_load_time[channel],
PIT_FREQ, ticks_per_sec(pt->vcpu));
- switch(c->mode) {
+ switch ( c->mode )
+ {
case 0:
case 1:
case 4:
return counter;
}
-/* get pit output bit */
-int pit_get_out(PITState *pit, int channel, int64_t current_time)
+int pit_get_out(PITState *pit, int channel)
{
struct hvm_hw_pit_channel *s = &pit->hw.channels[channel];
- uint64_t d;
+ uint64_t d, current_time;
int out;
+ current_time = hvm_get_guest_time(pit->pt[channel].vcpu);
d = muldiv64(current_time - pit->count_load_time[channel],
PIT_FREQ, ticks_per_sec(pit->pt[channel].vcpu));
- switch(s->mode) {
+
+ switch ( s->mode )
+ {
default:
case 0:
out = (d >= s->count);
out = (d < s->count);
break;
case 2:
- if ((d % s->count) == 0 && d != 0)
- out = 1;
- else
- out = 0;
+ out = (((d % s->count) == 0) && (d != 0));
break;
case 3:
- out = (d % s->count) < ((s->count + 1) >> 1);
+ out = ((d % s->count) < ((s->count + 1) >> 1));
break;
case 4:
case 5:
out = (d == s->count);
break;
}
+
return out;
}
struct hvm_hw_pit_channel *s = &pit->hw.channels[channel];
struct periodic_time *pt = &pit->pt[channel];
- switch(s->mode) {
+ switch ( s->mode )
+ {
default:
case 0:
case 4:
break;
case 1:
case 5:
- if (s->gate < val) {
- /* restart counting on rising edge */
- pit->count_load_time[channel] = hvm_get_guest_time(pt->vcpu);
-// pit_irq_timer_update(s, s->count_load_time);
- }
- break;
case 2:
case 3:
- if (s->gate < val) {
- /* restart counting on rising edge */
+ /* Restart counting on rising edge. */
+ if ( s->gate < val )
pit->count_load_time[channel] = hvm_get_guest_time(pt->vcpu);
-// pit_irq_timer_update(s, s->count_load_time);
- }
- /* XXX: disable/enable counting */
break;
}
+
s->gate = val;
}
*count_load_time = hvm_get_guest_time(v);
}
-static inline void pit_load_count(PITState *pit, int channel, int val)
+static void pit_load_count(PITState *pit, int channel, int val)
{
u32 period;
struct hvm_hw_pit_channel *s = &pit->hw.channels[channel];
struct periodic_time *pt = &pit->pt[channel];
+ struct domain *d = container_of(pit, struct domain,
+ arch.hvm_domain.pl_time.vpit);
struct vcpu *v;
- if (val == 0)
+ if ( val == 0 )
val = 0x10000;
+
pit->count_load_time[channel] = hvm_get_guest_time(pt->vcpu);
s->count = val;
period = DIV_ROUND((val * 1000000000ULL), PIT_FREQ);
- if (channel != 0)
+ if ( !is_hvm_domain(d) || (channel != 0) )
return;
-#ifdef DEBUG_PIT
- printk("HVM_PIT: pit-load-counter(%p), count=0x%x, period=%uns mode=%d, load_time=%lld\n",
- s,
- val,
- period,
- s->mode,
- (long long)pit->count_load_time[channel]);
-#endif
-
/* Choose a vcpu to set the timer on: current if appropriate else vcpu 0 */
- if ( likely(pit == ¤t->domain->arch.hvm_domain.pl_time.vpit) )
+ if ( pit == ¤t->domain->arch.hvm_domain.pl_time.vpit )
v = current;
else
- v = container_of(pit, struct domain,
- arch.hvm_domain.pl_time.vpit)->vcpu[0];
+ v = d->vcpu[0];
- switch (s->mode) {
+ switch ( s->mode )
+ {
case 2:
- /* create periodic time */
+ /* Periodic timer. */
create_periodic_time(v, pt, period, 0, 0, pit_time_fired,
&pit->count_load_time[channel]);
break;
case 1:
- /* create one shot time */
+ /* One-shot timer. */
create_periodic_time(v, pt, period, 0, 1, pit_time_fired,
&pit->count_load_time[channel]);
-#ifdef DEBUG_PIT
- printk("HVM_PIT: create one shot time.\n");
-#endif
break;
default:
destroy_periodic_time(pt);
}
}
-/* if already latched, do not latch again */
static void pit_latch_count(PITState *s, int channel)
{
struct hvm_hw_pit_channel *c = &s->hw.channels[channel];
- if (!c->count_latched) {
+ if ( !c->count_latched )
+ {
c->latched_count = pit_get_count(s, channel);
c->count_latched = c->rw_mode;
}
}
+static void pit_latch_status(PITState *s, int channel)
+{
+ struct hvm_hw_pit_channel *c = &s->hw.channels[channel];
+ if ( !c->status_latched )
+ {
+ /* TODO: Return NULL COUNT (bit 6). */
+ c->status = ((pit_get_out(s, channel) << 7) |
+ (c->rw_mode << 4) |
+ (c->mode << 1) |
+ c->bcd);
+ c->status_latched = 1;
+ }
+}
+
static void pit_ioport_write(void *opaque, uint32_t addr, uint32_t val)
{
PITState *pit = opaque;
int channel, access;
struct hvm_hw_pit_channel *s;
- val &= 0xff;
+ val &= 0xff;
addr &= 3;
- if (addr == 3) {
+
+ if ( addr == 3 )
+ {
channel = val >> 6;
- if (channel == 3) {
- /* read back command */
- for(channel = 0; channel < 3; channel++) {
+ if ( channel == 3 )
+ {
+ /* Read-Back Command. */
+ for ( channel = 0; channel < 3; channel++ )
+ {
s = &pit->hw.channels[channel];
- if (val & (2 << channel)) {
- if (!(val & 0x20)) {
+ if ( val & (2 << channel) )
+ {
+ if ( !(val & 0x20) )
pit_latch_count(pit, channel);
- }
- if (!(val & 0x10) && !s->status_latched) {
- /* status latch */
- /* XXX: add BCD and null count */
- s->status = (pit_get_out(pit, channel, hvm_get_guest_time(pit->pt[channel].vcpu)) << 7) |
- (s->rw_mode << 4) |
- (s->mode << 1) |
- s->bcd;
- s->status_latched = 1;
- }
+ if ( !(val & 0x10) )
+ pit_latch_status(pit, channel);
}
}
- } else {
+ }
+ else
+ {
+ /* Select Counter <channel>. */
s = &pit->hw.channels[channel];
access = (val >> 4) & 3;
- if (access == 0) {
+ if ( access == 0 )
+ {
pit_latch_count(pit, channel);
- } else {
+ }
+ else
+ {
s->rw_mode = access;
s->read_state = access;
s->write_state = access;
-
s->mode = (val >> 1) & 7;
+ if ( s->mode > 5 )
+ s->mode -= 4;
s->bcd = val & 1;
/* XXX: update irq timer ? */
}
}
- } else {
+ }
+ else
+ {
+ /* Write Count. */
s = &pit->hw.channels[addr];
- switch(s->write_state) {
+ switch ( s->write_state )
+ {
default:
case RW_STATE_LSB:
pit_load_count(pit, addr, val);
addr &= 3;
s = &pit->hw.channels[addr];
- if (s->status_latched) {
+
+ if ( s->status_latched )
+ {
s->status_latched = 0;
ret = s->status;
- } else if (s->count_latched) {
- switch(s->count_latched) {
+ }
+ else if ( s->count_latched )
+ {
+ switch ( s->count_latched )
+ {
default:
case RW_STATE_LSB:
ret = s->latched_count & 0xff;
s->count_latched = RW_STATE_MSB;
break;
}
- } else {
- switch(s->read_state) {
+ }
+ else
+ {
+ switch ( s->read_state )
+ {
default:
case RW_STATE_LSB:
count = pit_get_count(pit, addr);
break;
}
}
+
return ret;
}
struct periodic_time *pt;
int i;
- for(i = 0; i < 3; i++) {
+ for ( i = 0; i < 3; i++ )
+ {
printk("*****pit channel %d's state:*****\n", i);
s = &pit->hw.channels[i];
printk("pit 0x%x.\n", s->count);
printk("pit %"PRId64"\n", pit->count_load_time[i]);
pt = &pit->pt[i];
- if (pt) {
+ if ( pt )
+ {
printk("pit channel %d has a periodic timer:\n", i);
printk("pt %d.\n", pt->enabled);
printk("pt %d.\n", pt->one_shot);
printk("pt %"PRId64"\n", pt->last_plt_gtime);
}
}
-
}
#else
static void pit_info(PITState *pit)
/* Recreate platform timers from hardware state. There will be some
* time jitter here, but the wall-clock will have jumped massively, so
* we hope the guest can handle it. */
-
- for(i = 0; i < 3; i++) {
+ for ( i = 0; i < 3; i++ )
+ {
pit_load_count(pit, i, pit->hw.channels[i].count);
pit->pt[i].last_plt_gtime = hvm_get_guest_time(d->vcpu[0]);
}
struct hvm_hw_pit_channel *s;
int i;
- for(i = 0;i < 3; i++) {
+ for ( i = 0; i < 3; i++ )
+ {
s = &pit->hw.channels[i];
destroy_periodic_time(&pit->pt[i]);
s->mode = 0xff; /* the init mode */
struct periodic_time *pt;
pt = &pit->pt[0];
- pt->vcpu = v;
- /* the timer 0 is connected to an IRQ */
- init_timer(&pt->timer, pt_timer_fn, pt, v->processor);
- pt++; pt->vcpu = v;
- pt++; pt->vcpu = v;
+ pt[0].vcpu = v;
+ pt[1].vcpu = v;
+ pt[2].vcpu = v;
register_portio_handler(v->domain, PIT_BASE, 4, handle_pit_io);
/* register the speaker port */
register_portio_handler(v->domain, 0x61, 1, handle_speaker_io);
ticks_per_sec(v) = cpu_khz * (int64_t)1000;
-#ifdef DEBUG_PIT
- printk("HVM_PIT: guest frequency =%lld\n", (long long)ticks_per_sec(v));
-#endif
pit_reset(pit);
- return;
-}
-
-void pit_migrate_timers(struct vcpu *v)
-{
- PITState *pit = &v->domain->arch.hvm_domain.pl_time.vpit;
- struct periodic_time *pt;
-
- pt = &pit->pt[0];
- if ( pt->vcpu == v && pt->enabled )
- migrate_timer(&pt->timer, v->processor);
}
void pit_deinit(struct domain *d)
{
PITState *pit = &d->arch.hvm_domain.pl_time.vpit;
-
- kill_timer(&pit->pt[0].timer);
+ destroy_periodic_time(&pit->pt[0]);
}
/* the intercept action for PIT DM retval:0--not handled; 1--handled */
struct vcpu *v = current;
struct PITState *vpit = &(v->domain->arch.hvm_domain.pl_time.vpit);
- if (p->size != 1 ||
- p->data_is_ptr ||
- p->type != IOREQ_TYPE_PIO){
- printk("HVM_PIT:wrong PIT IO!\n");
+ if ( (p->size != 1) || p->data_is_ptr || (p->type != IOREQ_TYPE_PIO) )
+ {
+ gdprintk(XENLOG_WARNING, "HVM_PIT bad access\n");
return 1;
}
- if (p->dir == 0) {/* write */
+ if ( p->dir == IOREQ_WRITE )
+ {
pit_ioport_write(vpit, p->addr, p->data);
- } else if (p->dir == 1) { /* read */
- if ( (p->addr & 3) != 3 ) {
+ }
+ else
+ {
+ if ( (p->addr & 3) != 3 )
p->data = pit_ioport_read(vpit, p->addr);
- } else {
- printk("HVM_PIT: read A1:A0=3!\n");
- }
+ else
+ gdprintk(XENLOG_WARNING, "HVM_PIT: read A1:A0=3!\n");
}
+
return 1;
}
static uint32_t speaker_ioport_read(void *opaque, uint32_t addr)
{
PITState *pit = opaque;
- int out = pit_get_out(pit, 2,
- hvm_get_guest_time(pit->pt[2].vcpu));
/* Refresh clock toggles at about 15us. We approximate as 2^14ns. */
unsigned int refresh_clock = ((unsigned int)NOW() >> 14) & 1;
return ((pit->hw.speaker_data_on << 1) | pit_get_gate(pit, 2) |
- (out << 5) | refresh_clock << 4);
+ (pit_get_out(pit, 2) << 5) | (refresh_clock << 4));
}
static int handle_speaker_io(ioreq_t *p)
struct vcpu *v = current;
struct PITState *vpit = &(v->domain->arch.hvm_domain.pl_time.vpit);
- if (p->size != 1 ||
- p->data_is_ptr ||
- p->type != IOREQ_TYPE_PIO){
- printk("HVM_SPEAKER:wrong SPEAKER IO!\n");
+ if ( (p->size != 1) || p->data_is_ptr || (p->type != IOREQ_TYPE_PIO) )
+ {
+ gdprintk(XENLOG_WARNING, "HVM_SPEAKER bad access\n");
return 1;
}
- if (p->dir == 0) {/* write */
+ if ( p->dir == IOREQ_WRITE )
speaker_ioport_write(vpit, p->addr, p->data);
- } else if (p->dir == 1) {/* read */
+ else
p->data = speaker_ioport_read(vpit, p->addr);
- }
return 1;
}
.data = write ? data : 0,
};
- if (port == 0x61)
+ if ( port == 0x61 )
handle_speaker_io(&ioreq);
else
handle_pit_io(&ioreq);
#include <asm/hvm/support.h>
#include <asm/current.h>
-/* #define DEBUG_RTC */
-
void rtc_periodic_cb(struct vcpu *v, void *opaque)
{
RTCState *s = opaque;
{
if ( period_code <= 2 )
period_code += 7;
-
+
period = 1 << (period_code - 1); /* period in 32 Khz cycles */
period = DIV_ROUND((period * 1000000000ULL), 32768); /* period in ns */
-#ifdef DEBUG_RTC
- printk("HVM_RTC: period = %uns\n", period);
-#endif
- create_periodic_time(v, &s->pt, period, RTC_IRQ, 0, rtc_periodic_cb, s);
- }
+ create_periodic_time(v, &s->pt, period, RTC_IRQ,
+ 0, rtc_periodic_cb, s);
+ }
else
+ {
destroy_periodic_time(&s->pt);
+ }
}
static void rtc_set_time(RTCState *s);
return (s->hw.cmos_index < RTC_CMOS_SIZE);
}
- if (s->hw.cmos_index >= RTC_CMOS_SIZE)
+ if ( s->hw.cmos_index >= RTC_CMOS_SIZE )
return 0;
-#ifdef DEBUG_RTC
- printk("HVM_RTC: write index=0x%02x val=0x%02x\n",
- s->hw.cmos_index, data);
-#endif
-
switch ( s->hw.cmos_index )
{
case RTC_SECONDS_ALARM:
{
const struct tm *tm = &s->current_tm;
- if (s->time_offset_seconds != s->pt.vcpu->domain->time_offset_seconds) {
+ if ( s->time_offset_seconds != s->pt.vcpu->domain->time_offset_seconds )
+ {
s->current_tm = gmtime(get_localtime(s->pt.vcpu->domain));
s->time_offset_seconds = s->pt.vcpu->domain->time_offset_seconds;
}
struct tm *tm = &s->current_tm;
int days_in_month;
- if (s->time_offset_seconds != s->pt.vcpu->domain->time_offset_seconds) {
+ if ( s->time_offset_seconds != s->pt.vcpu->domain->time_offset_seconds )
+ {
s->current_tm = gmtime(get_localtime(s->pt.vcpu->domain));
s->time_offset_seconds = s->pt.vcpu->domain->time_offset_seconds;
}
tm->tm_sec++;
- if ((unsigned)tm->tm_sec >= 60) {
+ if ( (unsigned)tm->tm_sec >= 60 )
+ {
tm->tm_sec = 0;
tm->tm_min++;
- if ((unsigned)tm->tm_min >= 60) {
+ if ( (unsigned)tm->tm_min >= 60 )
+ {
tm->tm_min = 0;
tm->tm_hour++;
- if ((unsigned)tm->tm_hour >= 24) {
+ if ( (unsigned)tm->tm_hour >= 24 )
+ {
tm->tm_hour = 0;
/* next day */
tm->tm_wday++;
- if ((unsigned)tm->tm_wday >= 7)
+ if ( (unsigned)tm->tm_wday >= 7 )
tm->tm_wday = 0;
days_in_month = get_days_in_month(tm->tm_mon,
tm->tm_year + 1900);
tm->tm_mday++;
- if (tm->tm_mday < 1) {
+ if ( tm->tm_mday < 1 )
+ {
tm->tm_mday = 1;
- } else if (tm->tm_mday > days_in_month) {
+ }
+ else if ( tm->tm_mday > days_in_month )
+ {
tm->tm_mday = 1;
tm->tm_mon++;
- if (tm->tm_mon >= 12) {
+ if ( tm->tm_mon >= 12 )
+ {
tm->tm_mon = 0;
tm->tm_year++;
}
break;
}
-#ifdef DEBUG_RTC
- printk("HVM_RTC: read index=0x%02x val=0x%02x\n",
- s->hw.cmos_index, ret);
-#endif
-
return ret;
}
if ( (p->size != 1) || p->data_is_ptr || (p->type != IOREQ_TYPE_PIO) )
{
- printk("HVM_RTC: wrong RTC IO!\n");
+ gdprintk(XENLOG_WARNING, "HVM_RTC bas access\n");
return 1;
}
- if ( p->dir == 0 ) /* write */
+ if ( p->dir == IOREQ_WRITE )
{
if ( rtc_ioport_write(vrtc, p->addr, p->data & 0xFF) )
return 1;
}
- else if ( (p->dir == 1) && (vrtc->hw.cmos_index < RTC_CMOS_SIZE) ) /* read */
+ else if ( vrtc->hw.cmos_index < RTC_CMOS_SIZE )
{
p->data = rtc_ioport_read(vrtc, p->addr);
return 1;
return 0;
}
-/* Move the RTC timers on to this vcpu's current cpu */
void rtc_migrate_timers(struct vcpu *v)
{
RTCState *s = &v->domain->arch.hvm_domain.pl_time.vrtc;
- if ( s->pt.vcpu == v )
+ if ( v->vcpu_id == 0 )
{
- if ( s->pt.enabled )
- migrate_timer(&s->pt.timer, v->processor);
migrate_timer(&s->second_timer, v->processor);
migrate_timer(&s->second_timer2, v->processor);
}
s->current_tm = gmtime(get_localtime(v->domain));
rtc_copy_date(s);
- init_timer(&s->pt.timer, pt_timer_fn, &s->pt, v->processor);
init_timer(&s->second_timer, rtc_update_second, s, v->processor);
init_timer(&s->second_timer2, rtc_update_second2, s, v->processor);
{
RTCState *s = &d->arch.hvm_domain.pl_time.vrtc;
- kill_timer(&s->pt.timer);
+ destroy_periodic_time(&s->pt);
kill_timer(&s->second_timer);
kill_timer(&s->second_timer2);
}
#include <asm/hvm/vpt.h>
#include <asm/event.h>
-static __inline__ void missed_ticks(struct periodic_time *pt)
+static void missed_ticks(struct periodic_time *pt)
{
s_time_t missed_ticks;
missed_ticks = NOW() - pt->scheduled;
- if ( missed_ticks > 0 )
+ if ( missed_ticks <= 0 )
+ return;
+
+ missed_ticks = missed_ticks / (s_time_t) pt->period + 1;
+ if ( missed_ticks > 1000 )
{
- missed_ticks = missed_ticks / (s_time_t) pt->period + 1;
- if ( missed_ticks > 1000 )
- {
- /* TODO: Adjust guest time together */
- pt->pending_intr_nr++;
- }
- else
- {
- pt->pending_intr_nr += missed_ticks;
- }
- pt->scheduled += missed_ticks * pt->period;
+ /* TODO: Adjust guest time together */
+ pt->pending_intr_nr++;
}
+ else
+ {
+ pt->pending_intr_nr += missed_ticks;
+ }
+
+ pt->scheduled += missed_ticks * pt->period;
}
void pt_freeze_time(struct vcpu *v)
{
struct list_head *head = &v->arch.hvm_vcpu.tm_list;
- struct list_head *list;
struct periodic_time *pt;
if ( test_bit(_VPF_blocked, &v->pause_flags) )
v->arch.hvm_vcpu.guest_time = hvm_get_guest_time(v);
- list_for_each( list, head )
- {
- pt = list_entry(list, struct periodic_time, list);
+ list_for_each_entry ( pt, head, list )
stop_timer(&pt->timer);
- }
}
void pt_thaw_time(struct vcpu *v)
{
struct list_head *head = &v->arch.hvm_vcpu.tm_list;
- struct list_head *list;
struct periodic_time *pt;
if ( v->arch.hvm_vcpu.guest_time )
hvm_set_guest_time(v, v->arch.hvm_vcpu.guest_time);
v->arch.hvm_vcpu.guest_time = 0;
- list_for_each( list, head )
+ list_for_each_entry ( pt, head, list )
{
- pt = list_entry(list, struct periodic_time, list);
missed_ticks(pt);
set_timer(&pt->timer, pt->scheduled);
}
}
}
-/* Hook function for the platform periodic time */
-void pt_timer_fn(void *data)
+static void pt_timer_fn(void *data)
{
struct periodic_time *pt = data;
void pt_update_irq(struct vcpu *v)
{
struct list_head *head = &v->arch.hvm_vcpu.tm_list;
- struct list_head *list;
struct periodic_time *pt;
uint64_t max_lag = -1ULL;
int irq = -1;
- list_for_each( list, head )
+ list_for_each_entry ( pt, head, list )
{
- pt = list_entry(list, struct periodic_time, list);
if ( !is_isa_irq_masked(v, pt->irq) && pt->pending_intr_nr &&
((pt->last_plt_gtime + pt->period_cycles) < max_lag) )
{
struct periodic_time *is_pt_irq(struct vcpu *v, int vector, int type)
{
struct list_head *head = &v->arch.hvm_vcpu.tm_list;
- struct list_head *list;
struct periodic_time *pt;
struct RTCState *rtc = &v->domain->arch.hvm_domain.pl_time.vrtc;
int vec;
- list_for_each( list, head )
+ list_for_each_entry ( pt, head, list )
{
- pt = list_entry(list, struct periodic_time, list);
if ( !pt->pending_intr_nr )
continue;
pt->cb(pt->vcpu, pt->priv);
}
-/* If pt is enabled, discard pending intr */
void pt_reset(struct vcpu *v)
{
struct list_head *head = &v->arch.hvm_vcpu.tm_list;
- struct list_head *list;
struct periodic_time *pt;
- list_for_each( list, head )
+ list_for_each_entry ( pt, head, list )
{
- pt = list_entry(list, struct periodic_time, list);
- if ( pt->enabled )
+ if ( pt->enabled )
{
pt->pending_intr_nr = 0;
pt->last_plt_gtime = hvm_get_guest_time(pt->vcpu);
}
}
-void create_periodic_time(struct vcpu *v, struct periodic_time *pt, uint64_t period,
- uint8_t irq, char one_shot, time_cb *cb, void *data)
+void pt_migrate(struct vcpu *v)
+{
+ struct list_head *head = &v->arch.hvm_vcpu.tm_list;
+ struct periodic_time *pt;
+
+ list_for_each_entry ( pt, head, list )
+ {
+ if ( pt->enabled )
+ migrate_timer(&pt->timer, v->processor);
+ }
+}
+
+void create_periodic_time(
+ struct vcpu *v, struct periodic_time *pt, uint64_t period,
+ uint8_t irq, char one_shot, time_cb *cb, void *data)
{
destroy_periodic_time(pt);
+ init_timer(&pt->timer, pt_timer_fn, pt, v->processor);
pt->enabled = 1;
if ( period < 900000 ) /* < 0.9 ms */
{
void destroy_periodic_time(struct periodic_time *pt)
{
- if ( pt->enabled )
- {
- pt->enabled = 0;
- pt->pending_intr_nr = 0;
- list_del(&pt->list);
- stop_timer(&pt->timer);
- }
+ if ( !pt->enabled )
+ return;
+
+ pt->enabled = 0;
+ pt->pending_intr_nr = 0;
+ list_del(&pt->list);
+ kill_timer(&pt->timer);
}
projects / xen.git / commitdiff